DeepSeek is reportedly designing its own AI inference chip, aiming to cut its dependence on Nvidia and Huawei hardware. Reuters, citing three people familiar with the effort, reports the chip is being fabbed at SMIC, China's largest foundry, on its most advanced publicly-linked 7-nanometer node; sample chips are said to already be running, with mass deployment targeted before the end of 2026 and a stated goal of cutting inference costs 30-50%.

Last updated August 4, 2026: added the reported foundry partner (SMIC), a concrete late-2026 deployment timeline and cost-reduction target, and that DeepSeek isn't alone in this move, rival Zhipu AI is pursuing a similar strategy, none of which were in the original report.

What Happened: DeepSeek's Custom Inference Chip Project

Reuters reported on July 7, 2026 that the project began around July 2025 and has included roughly a year of discussions with chip designers, foundries, and memory suppliers, alongside private recruitment of semiconductor engineers. DeepSeek has not officially confirmed the effort, and the reporting is attributed to unnamed sources, standard for a project a Chinese chip developer would have real incentive to keep quiet given US export-control scrutiny.

The chip targets inference specifically, the stage where deployed models generate responses to user queries, distinct from the training chips used to build models in the first place. As DeepSeek's models gain users, inference costs become an increasingly significant share of operating expenses, which is the direct motivation Reuters' sources cited, and unlike a one-time training run, inference cost scales continuously with usage, which is why a company serving a growing user base has a much stronger long-term incentive to control inference hardware than training hardware alone.

DeepSeek Isn't Alone: Zhipu AI Is Making the Same Bet

DeepSeek isn't the only Chinese AI lab moving from pure algorithm work into chip design. Zhipu AI is reportedly pursuing a similar full-stack strategy, suggesting this isn't an isolated DeepSeek initiative but an emerging pattern among Chinese AI labs responding to the same US export-control pressure and hardware supply constraints. That pattern matters more than any single company's chip project: it signals Chinese AI labs increasingly see hardware independence as necessary infrastructure, not just a DeepSeek-specific cost play.

SMIC's 7nm ceiling exists because of a specific piece of hardware it can't access: extreme ultraviolet (EUV) lithography machines, made exclusively by the Dutch company ASML, which are required to manufacture chips at 5nm and below. Export controls have blocked SMIC from acquiring EUV equipment, which is why it's limited to older deep ultraviolet (DUV) lithography techniques that can be pushed to produce 7nm chips through multi-patterning, a more complex, lower-yield process than a true EUV-based node, but a real ceiling nonetheless. Nvidia's most advanced inference chips, by contrast, are fabricated by TSMC on nodes at 5nm, 4nm, and below, which is the core of the capability gap DeepSeek's chip will likely face regardless of how well its architecture is designed around SMIC's constraints.

Why It Matters

A 30-50% inference cost reduction target, if achieved, would meaningfully change the economics of running DeepSeek's models at scale, extending the "doing more with less" efficiency philosophy that made DeepSeek's training approach notable to the inference layer. But SMIC's 7nm ceiling, the most advanced node it can access under current US and Dutch export controls, means DeepSeek's chip will likely trail Nvidia's leading-edge inference hardware on raw capability even if the cost math works out domestically.

What Happens Next

With sample chips reportedly already running, the real test is whether DeepSeek hits its stated end-of-2026 mass deployment target and whether the 30-50% cost reduction goal holds up once the chip is actually serving production traffic rather than samples. Zhipu AI's parallel effort will be a useful comparison point for whether this approach generalizes across Chinese AI labs.

Final Takeaway

This has moved from a vague ambition to a project with a named likely foundry, a process node, running samples, and a stated timeline, real progress since the initial report, even though DeepSeek hasn't officially confirmed any of it. Whether SMIC's 7nm ceiling limits the chip's real-world competitiveness against Nvidia is the open question mass deployment will answer, and it's a question with implications well beyond DeepSeek, since the same node constraint applies to every Chinese AI lab pursuing a similar hardware-independence strategy.

Key Points

  • The chip is reportedly being fabbed at SMIC on a 7nm process, China's most advanced node publicly linked to production under current export controls.
  • Sample chips are said to be running already, with mass deployment targeted before the end of 2026 and a stated goal of 30-50% lower inference costs.
  • Rival Zhipu AI is reportedly pursuing a similar chip strategy, suggesting this is an emerging pattern among Chinese AI labs, not an isolated DeepSeek move.

China's Semiconductor Landscape

DeepSeek's chip project exists within a challenging environment for Chinese semiconductor development. US export controls have restricted access to advanced lithography equipment, particularly extreme ultraviolet lithography systems from ASML. These restrictions limit Chinese companies' ability to manufacture chips at the most advanced process nodes.

China has responded with massive domestic investment in semiconductor capabilities. The country's National Integrated Circuit Industry Investment Fund, commonly known as the Big Fund, has channeled billions of dollars into domestic chip development. SMIC, China's leading foundry, has made progress at 7nm and smaller nodes despite equipment constraints.

For DeepSeek specifically, manufacturing options may include partnerships with domestic foundries, alternative packaging approaches like chiplet designs, or focusing on architectures that deliver competitive performance at less advanced nodes through specialized design.

Inference vs. Training Economics

The distinction between inference and training chips is important for understanding DeepSeek's strategy. Training large models requires massive compute resources concentrated in data centers. Inference, by contrast, occurs whenever a deployed model responds to a user query. For popular models, inference costs can exceed training costs within months of deployment.

A custom inference chip optimized for DeepSeek's specific model architecture could achieve better performance per watt than general-purpose alternatives. This is particularly valuable for a company that has emphasized cost efficiency, as demonstrated by its earlier models that achieved competitive performance with fewer training resources.

FAQs

When will DeepSeek's chip be available?
Reuters' sources say sample chips are already running, with mass deployment targeted before the end of 2026, though DeepSeek hasn't officially confirmed this timeline.
Will the chip be sold to other companies?
Reports suggest the chip is for internal use to reduce DeepSeek's dependence on external suppliers. There is no indication it will be offered commercially.
Who is fabricating DeepSeek's chip?
Reuters reports the chip is being fabbed at SMIC, China's largest foundry, on a 7-nanometer process node, the most advanced node publicly linked to SMIC's production under current US and Dutch export controls.
Why is DeepSeek building an inference chip instead of a training chip?
Inference costs, the compute used when a deployed model answers user queries, can exceed training costs within months for popular models, making inference efficiency a bigger long-term expense to control.
Which other companies have built their own AI chips?
Google has its TPU series, Amazon has Trainium and Inferentia, and Microsoft has been developing its own AI chips, reflecting a broader industry trend toward custom silicon.
Is DeepSeek the only Chinese AI lab building its own chip?
No. Rival Zhipu AI is reportedly pursuing a similar strategy, suggesting a broader pattern among Chinese AI labs moving from pure algorithm development into full-stack chip design.
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